Such line circuits, particularly those involving a telephone Subscriber Line Interface Circuit (SLIC) and embodied in the form of a monolithic Integrated Circuit or chip, are known for instance from the IEEE Journal of Solid-State Circuits, Vol. SC-18, No 3, June 1983, p. 316 to 324, and Vol. SC-21, No 2, April 1986, p. 252 to 258 as well as from the European patent application published under No 0201635 (J. PIETERS 3). Particularly to allow a low power dissipation in the SLIC, the measures relied upon in these earlier designs include DC and AC line feed impedances using loop synthesis and starting from relatively low resistance, e.g. 50 ohm, physical feed resistors to obtain higher synthesized values as desired by the telephone administrations or operating companies. For the DC feed resistances for instance and for a given DC line current, the power consumption is in direct proportion to the value of the physical resistors. Building effective and adjustable synthesized line feed impedances, both for AC and DC, involves sensing the voltages across the two physical feed resistors using a high ohmic resistor bridge, usually two potentiometers diagonally cross-connected with the low ohmic feed resistors to constitute a 6-resistance 3-port Herter bridge between the line and the exchange and with its sensing port followed by a voltage transducer. The output from the latter is subtracted from the input signals feeding two line driver amplifiers whose outputs are coupled to their respective line wires, each time in series with a protecting resistor e.g. 10 ohm, and the feed resistor originating one of the sensed voltage. In this way, the total synthesized resistance for instance is readily assessed to be equal to twice the sum of the original feed and protecting resistances, e.g. 60 ohm, and of the original feed resistance multiplied by the transducer or total DC loop gain which can be programmed under software control. Additionally, a synthesized battery voltage is also produced in a similar manner so that it is added to the voltage generated by the DC line current due to the total synthesized resistance, to constitute the effective synthesized DC feed voltage between the two line wires.
Additionally, the A-wire should be biassed a few volts below ground potential and the B-wire by a like amount above the negative supply potential to allow for the maximum required AC swing of speech signals. Since metering signals may also appear on the wires, such bias voltages must also take these into account to avoid saturation of the line driver amplifiers during the transmission of such metering signals, either by allowing a margin catering for the maximum amplitude of the metering signals as in the European application published under No 0078347 (J. DANNEELS 7) or preferably by varying the bias in function of the metering signal value as in the Belgian patent No 898051 (L. BIENSTMAN 5) and the 1986 article referred to above. To create the A and B biasses and additionally enable battery reversals with exchange of the biasses, the latter article discloses a circuit with three resistances effectively in series between ground and the negative supply potential with two resistances each developing the same desired metering adjustable bias so that the potentials at the terminals of the intermediate resistance correspond to the desired biasses. Using current mirrors and a differential gating circuit, equivalent biasses can be applied to the A and B or the B and A wires depending on the desired polarity.
Such a circuitry, first producing the A(B)-wire DC bias, second the synthesized feed voltage between the two wires and third, using the difference between the first and the second the B(A)-wire DC bias is relatively complex, not largely exempt from noise, does not guarantee equal bias variations on the A- and B-wires and cannot permit special signalling conditions thereon, e.g. Belgian patent No 903911 (J. PIETERS 5). In the latter, the polarity reversal circuit can apply respective input potentials to the operational amplifiers constituting the A and B line drivers in high and low or low and high fashion, but also low for both drivers to allow ground signalling on each of the two wires. Moreover, it would also be desirable to allow the fourth possible combination for A and B wire biassing, i.e. both at high level as required for certain applications.